The H854/65 is a single-chip microc

The H854/65 is a single-chip microcontroller, which is available in low cost packages, and is designed around a high performance processor architecture that executes instructions in two to four clocks, six times the rate of standard 80C51 devices. In order to reduce component count, board space, and system cost, many system-level functions have been incorporated into the device.

Features
- Input multiplexed 8-bit ADC/single DAC output. Two analog comparators with selectable inputs and reference source.
- A 23-bit system timer that may also be used as real-time clock comprised of a 7-bit prescaler and a programmable and readable 16-bit timer.
- Two 16-bit counter/timers. Timer 0 (and Timer 1 - P89LPC9171) may be configured to toggle a port output upon timer overflow or to become a PWM output.
- Enhanced UART with a fractional baud rate generator, break detect, framing error detection, and automatic address detection; 400 kHz byte-wide I2C-bus communication port.
- SPI communication port (P89LPC9161).
- 2.4 V to 3.6 V VDD operating range. I/O pins are 5 V tolerant (may be pulled up or driven to 5.5 V).
- Enhanced low voltage (brownout) detect allows a controlled system shutdown when power fails.
- 16-pin TSSOP with 12 I/O pins minimum and up to 14 I/O pins while using on-chip oscillator and reset options (P89LPC9161/9171), and 14-pin TSSOP packages with 10 I/O pins minimum and up to 12 I/O pins while using on-chip oscillator and reset options (P89LPC9151).

Additional features
- A high performance 80C51 CPU provides instruction cycle times of 111 ns to 222 ns for all instructions except multiply and divide when executing at 18 MHz. This is six times the performance of the standard 80C51 running at the same clock frequency. A lower clock frequency for the same performance means power savings and reduced EMI.
- In-Application Programming (IAP-Lite) and byte erase allows code memory to be used for non-volatile data storage.
- Serial flash In-Circuit Programming (ICP) allows simple production coding using commercial EPROM programmers. Flash security bits prevent reading of sensitive application programs

Ergebnisse (Chinesisch Traditionell) 1:

The H854/65 is a single-chip microcontroller, which is available in low cost packages, and is designed around a high performance processor architecture that executes instructions in two to four clocks, six times the rate of standard 80C51 devices. In order to reduce component count, board space, and system cost, many system-level functions have been incorporated into the device. Features- Input multiplexed 8-bit ADC/single DAC output. Two analog comparators with selectable inputs and reference source. - A 23-bit system timer that may also be used as real-time clock comprised of a 7-bit prescaler and a programmable and readable 16-bit timer.- Two 16-bit counter/timers. Timer 0 (and Timer 1 - P89LPC9171) may be configured to toggle a port output upon timer overflow or to become a PWM output.- Enhanced UART with a fractional baud rate generator, break detect, framing error detection, and automatic address detection; 400 kHz byte-wide I2C-bus communication port. - SPI communication port (P89LPC9161).- 2.4 V to 3.6 V VDD operating range. I/O pins are 5 V tolerant (may be pulled up or driven to 5.5 V).- Enhanced low voltage (brownout) detect allows a controlled system shutdown when power fails.- 16-pin TSSOP with 12 I/O pins minimum and up to 14 I/O pins while using on-chip oscillator and reset options (P89LPC9161/9171), and 14-pin TSSOP packages with 10 I/O pins minimum and up to 12 I/O pins while using on-chip oscillator and reset options (P89LPC9151). 附加功能-高性能 80c51 CPU 提供運算速度時間的 111 至 222 ns ns 除乘法和除法執行 18 mhz 時的所有說明。這是性能標準 80 C 51 運行在相同的時鐘頻率的六倍。較低的時鐘頻率為相同的性能意味著節省電源和減少 EMI。--應用程式設計 (IAP 簡裝) 和位元組擦除允許代碼記憶體可用於非易失性資料存儲。-串列 flash 在電路程式設計 (ICP) 允許簡單生產編碼使用商用 EPROM 程式設計器。Flash 安全位防止敏感應用程式讀

Ergebnisse (Chinesisch Traditionell) 2:

在H854 / 65是一款單芯片微控制器，這是低成本的封裝，並設計了左右兩個到4個時鐘，標準80C51的6倍的速度執行指令的高性能處理器架構。為了減少元件數量，電路板空間和系統成本，許多系統級的功能已經被整合到設備中。特點-輸入多路復用8位ADC /單DAC輸出。兩個模擬比較器，可選擇輸入和參考源。-一個23位的系統定時器，也可被用作實時時鐘，由7位的預分頻器和一個可編程和可讀取16位定時器。- 2個16位計數器/定時器。定時器0（和定時器1 - P89LPC9171）可以被配置為在定時器溢出觸發端口輸出或作為PWM輸出。-增強型UART具有波特率發生器，間隔檢測，幀錯誤檢測和自動地址檢測; 400kHz字節寬的I2C總線通信端口。- SPI通信端口（P89LPC9161）。- 2.4 V至3.6 V VDD工作範圍。I / O引腳可承受5V（可上拉或驅動到5.5V）。-增強的低電壓（掉電）檢測可在控制系統關閉電源故障時，- 16引腳TSSOP與12個I / O引腳的最小和多達14個I / O引腳，而同時使用片內振盪器和使用片內振盪器和復位選項（P89LPC9161 / 9171），並與10個I / O引腳最低14引腳TSSOP封裝和多達12個I / O引腳重置選項（P89LPC9151）。附加功能-高性能的18 MHz的執行時，80C51 CPU的111 ns至222 ns的所有指令的指令週期時間除乘法和除法。這是標準80C51運行六倍在相同的時鐘頻率的性能。需要較低的時鐘頻率相同的性能意味著節能和降低EMI。-在應用編程（IAP-精簡版）和字節擦除功能允許用於非易失性數據存儲的程序存儲器。-串行Flash在電路編程（ICP ）可進行簡單的生產中使用商用EPROM編程器進行編碼。Flash保密位可防止程序被讀出的

Ergebnisse (Chinesisch Traditionell) 3:

的h854 / 65是一個單片微控制器，它在低成本的封裝是可用的，並設計一個高性能的處理器結構，指令執行兩到四鐘左右，六倍於標準80C51器件。為了减少元件數量，電路板空間和系統成本，許多系統級的功能已被納入設備。輸入複用8比特ADC / DAC輸出單。兩個類比比較器，可選擇輸入和參攷源。
-一個23比特的系統計时器，也可以作為即時時鐘由一比特預分頻器和一個可程式設計的、可讀的16比特計时器。
-兩個16比特定時/計數器。0計时器（計时器1 p89lpc9171）可切換在計时器溢出或埠輸出成為一個PWM輸出。
-增强型UART與分數串列傳輸速率發生器，中斷點檢測，幀錯誤檢測，自動地址檢測；400千赫位元組寬的I2C匯流排通信埠。
SPI通信埠（p89lpc9161）。
- 2.4 V至3.6 V的電壓工作範圍。的I / O引脚是5 V寬容（可能是拉升或帶動5.5 V）。
增强低電壓（掉電）檢測允許控制系統關閉電源故障時。
- 16引脚TSSOP 12的I / O引脚最少和最多14個I/O引脚在使用片上振盪器和復位選項（p89lpc9161 / 9171），14引脚TSSOP封裝具有10個I / O引脚最少和最多12個I/O引脚在使用片上振盪器和復位選項（p89lpc9151）。

附加功能
-高速80C51 CPU提供指令週期時間為111納秒至222納秒的所有指令除乘法和除法在18兆赫時執行。這是運行的標準80C51器件在相同的時鐘頻率的六倍。對於相同的效能較低的時鐘頻率是節能和减少電磁干擾。
-在應用程式設計（IAP Lite）和位元組擦除允許程式記憶體用於存儲非易失性數據。
在電路程式設計串列閃存（ICP）允許使用商用EPROM程式設計器編碼簡單的生產。閃存安全比特防止讀取敏感的應用程序